Abstract

Hardware efficient transpilation of quantum circuits to a quantum devices native gateset is essential for the execution of quantum algorithms on noisy quantum computers. Typical quantum devices utilize a gateset with a single two-qubit Clifford entangling gate per pair of coupled qubits, however, in some applications access to a non-Clifford two-qubit gate can result in more optimal circuit decompositions and also allows more flexibility in optimizing over noise. We demonstrate calibration of a low error non-Clifford Controlled-$\frac{\pi}{2}$ phase (CS) gate on a cloud based IBM Quantum computing using the Qiskit Pulse framework. To measure the gate error of the calibrated CS gate we perform non-Clifford CNOT-Dihedral interleaved randomized benchmarking. We are able to obtain a gate error of $5.9(7) \times 10^{-3}$ at a gate length 263 ns, which is close to the coherence limit of the associated qubits, and lower error than the backends standard calibrated CNOT gate.

Highlights

  • Quantum computation holds great promise for speeding up certain classes of problems; near-term applications are heavily restricted by the errors that occur on presentday noisy quantum devices [1]

  • We describe the protocol for estimating the average gate error of the CS gate using interleaved CNOT-dihedral randomized benchmarking, which is a natural generalization of the CNOT-dihedral RB procedure described in [17] with interleaved RB [13] to estimate individual gate fidelities for the CS = ⎜⎜⎜⎝00

  • To benchmark performance of the non-Clifford gate we performed an experimental demonstration of twoqubit interleaved CNOT-dihedral RB, which allows efficient and robust characterization of a universal gate set containing the CS gate

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Summary

INTRODUCTION

Quantum computation holds great promise for speeding up certain classes of problems; near-term applications are heavily restricted by the errors that occur on presentday noisy quantum devices [1]. In some cases it may be favorable to introduce an additional two-qubit gate to a gate set if it enables more hardware-efficient compilation of relevant circuits; this adds the overhead of additional calibration and characterization of the gate errors One such gate is the controlled-phase (CS) gate, which is a non-Clifford two-qubit entangling gate that is universal when combined with the Clifford group [17]. The CS gate is attractive to fixed-frequency transmon qubit systems as it can be implemented√using the CR interaction, since it is locally equivalent to CNOT This means it can be calibrated using the same techniques as the CNOT gate, but with a shorter gate duration or lower power, potentially leading to a higher-fidelity two-qubit gate when calibrated close to the coherence limit. Pulse-level calibration was done using Qiskit Pulse [22], and the RB and QPT experiments were implemented using the open source Qiskit computing software stack [23] through the IBM Quantum cloud provider

CNOT-DIHEDRAL RANDOMIZED BENCHMARKING
IMPLEMENTING THE CONTROLLED-S GATE
Gate calibration and benchmarks
Gate duration dependence
CONCLUSION
Findings
Closed-loop fine calibration

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