Abstract
Piezoresistance measurements have been obtained on narrow polycrystalline-silicon-gated silicon field-effect transistors. From the anomalous structure observed on the piezoresistance traces it has been deduced that large compressive intrinsic edge stresses are present in these devices. These are estimated from the experimental data to be approximately 180 N mm-2, in reasonable agreement with a theoretical calculation based on a model proposed to explain the presence of such large stresses.
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