Excess loop delay cancellation in sigma–delta modulators

Abstract

Excess loop delay in sigma–delta ( $$\Sigma\Delta$$ ) modulators, especially by increasing the level of noise in signal bandwidth in continuous kind of them, leads to a dramatic decrease in their efficiency. In this paper, the error originated from the loop delay is calculated analytically and a new structure for sigma–delta modulators is presented based upon this calculation. This new structure can compensate the effect of loop-delay error completely independent of amount of delay. So by changing in loop delay during system working, the proposed structure has ability to consistent itself with new conditions and re-eliminate the error. This ability is independent of being multi-bit and the order of modulator. To evaluate the efficiency of the proposed method and the corresponding structure, first and second order modulators with capability of eliminating the error of loop delay, have been designed and simulated. All of simulations show the correctness of proposed analysis. Comparison of the proposed structures with the previous works shows the effectiveness of our technique.