Escalating Challenges in Developing Complex Solutions for Next Generation Package and Interconnect Technologies

Abstract

There are several application and device trends driving IC package development today. Among the most prevalent are:- Form factor reduction for handheld devices- Increased functionality requiring higher bandwidth- Higher power dissipation- Higher operating frequencies resulting in reduced electrical noise margins- Increased use of sensors- Full conversion to green material sets- Silicon node progression. These trends occur concurrently in many applications, which often results in conflicting requirements. In addition, the market continues to apply relentless pricing pressure on the supply chain. Hence, simple, cost-effective solutions are mandatory. This presentation will highlight packaging technology developments that address the device and application trends listed above. Several innovative packaging platforms will be discussed:- Copper pillar CSP and BGA- Through Mold Via Package on Package (TMV ® PoP)- Flip Chip Molded BGA (FCMBGA)- Wafer Level CSP- Through Silicon Via CSP and BGA. In each case a clear value proposition will be presented, along with key supporting data. It is truly an exciting time to be part of the industry solving complex packaging and interconnect challenges.