Abstract
The conversion error of a pipelined A/D converter using inaccurate comparators is analyzed. Error bounds are established, and it is shown that the error can be compensated using simple analog circuitry combined with some digital logic. The resulting system is especially useful for fast converters in which accurate compensators would require a large chip area and large DC power. Simulations are presented to verify the efficiency of the proposed error correction scheme. >
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
