Equivalence Among Stochastic Logic Circuits and its Application to Synthesis

Abstract

Stochastic computing (SC) uses standard logic to process pseudo-random bit-streams denoting probabilities. It implements arith-metic operations by extremely simple and low-power hardware. Despite major new applications, various aspects of SC's theory and design requirements are poorly understood. We observe that the Boolean functions used in SC take the form $f(X)\;= \;f(X_{{\mathrm{V}}};X_{{\mathrm{C}}})$ , where X V and X C are inputs with variable and constant probabilities, respectively. Different functions can be equivalent in the sense of implying the same stochastic behavior. We define stochastic equivalence classes (SECs) based on the X V; X C partition, and explore their properties and applications. Suitably interpreted, SECs define all realizable arithmetic functions of interest. While conventional synthesis focuses on finding the best circuit to implement a known arithmetic function F , stochastic circuit optimization first requires finding the best logic function f that realizes F . We present an algorithm ESECS (extended SEC-based synthesis) for this problem, which includes a new stochastic circuit optimization process analogous to conventional two-level logic optimization. ESECS demonstrates the computational richness of SC and leads to major cost reductions compared to prior designs.