Energy Consumption in Digital Optical ICs With Plasmon Waveguide Interconnects

Abstract

Limits on energy consumption in digital optical integrated circuits (ICs) using conventional and plasmon waveguide interconnects are presented. The maximum allowable on-chip power density imposes a lower limit on the spacing between devices and together with clock skew imposes an upper limit on the clock frequency. Optical ICs with low-loss plasmon waveguide interconnects may become viable if plasmon waveguide losses in the range 0.1-0.01 dB/m can be achieved.