Abstract
A ternary content addressable memory (TCAM) speeds up the search process in the memory by searching through prestored contents rather than addresses. The additional don't care (X) state makes the TCAM suitable for many network applications but the large amount of cell requirement for storage consumes high power and takes a large design area. This paper presents a novel architecture of TCAM, which prestores 2 bits of data in an up-down manner and provides multiple masking operations through a single control multimasking circuit. The proposed dual bit associative memory with match error and mask control (EMDBAM) consumes low power and selects the valid value on matchline through match error controller. The proposed design has been implemented using a standard 45-nm CMOS technology, and the extracted layout has been simulated using SPECTRE with the supply voltage at 1 V. The proposed EMDBAM can reduce the cell area by 39% compared with a basic TCAM design with a reduction of 9.6% in the energy-delay product.
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