Electroless NiP processing for hybrid integrated circuits

Abstract

Electroless methods for depositing conductive layers on insulating materials can be used in producing hybrid integrated circuits (HIC's), as alternatives to the evaporation and sputter deposition techniques. Compared with these techniques, electroless procedures are in general relatively simple and it is easy to metallize holes in substrates. Further, electroless deposited NiP layers can be used for the integration of resistors. An electroless procedure will be described for metallizing alumina and fused quartz substrates, and further a method for producing resistive layers suitable for integrated resistors. After electroless plating the desired conductive patterns are obtained by localized electroplating with gold and etching away the unwanted parts of the NiP layer. Some properties of the conductive patterns obtained in this manner have been investigated, for instance: the adhesion between the metallic pattern and substrate, microwave losses in microstrip configuration, geometrical accuracies and performance of the resistive layers. A short description of the test methods applied will be given and the results discussed. Many hybrid integrated circuits for use at frequencies up to 22 GHz already have been made by using electroless procedures.