Electrical, Thermal, and Mechanical Characterization of eWLB, Fully Molded Fan-Out Package, and Fan-Out Chip Last Package

Abstract

Fan-out (FO) packages are widely used in handheld, mobile consumer, and Internet of Things (IoT) devices due to the facility they provide for a greater I/O density and the integration of multiple components in a single package. Various types of FO package are available, including embedded wafer-level BGA (eWLB), fully molded (FM), and a flip-chip-based structure referred to as a fan-out chip-last package (FOCLP). In this paper, ANSYS simulations are performed to examine the warpage, extreme low- $k$ (ELK) interconnect stress and board-level solder joint reliability of the various package types. The validity of the simulation model is confirmed by comparing the numerical results for the warpage of the eWLB and FM packages with the experimental observations. Further simulations are then performed to investigate the heat dissipation performance and electrical crosstalk properties of the three packages. Taguchi experiments are conducted to examine the effects of eight control factors [namely, the inclusion (or otherwise) of a backside laminate film, the board thickness, the joint standoff distance, the ball joint diameter, the under bump metallurgy (UBM) diameter, the joint pitch, the die thickness, and the Cu pillar height] on the thermomechanical reliability of the FM package under accelerated thermal cycling testing. Finally, the Taguchi analysis results are used to determine the optimal geometry design of the FM package.