Electrical characterization of CdZnTe/Si diode structure

Abstract

Temperature-dependent current-voltage $$\left( {I - V} \right) $$ , and frequency dependent capacitance-voltage $$\left( {C - V} \right) $$ and conductance-voltage $$\left( {G - V} \right) $$ measurements were performed in order to analyze characteristics of CdZnTe/Si structure. Obtained profiles enable us to understand the different characteristics of the diode structure such as the carrier conduction mechanism and the nature of the interfacial layer. Over the temperature range between 220 and 340 K, taking consideration of the disparity in the forward-biased current, the diode parameters such as saturation current $$\left( {I_{0} } \right)$$ , zero-bias barrier height ( $${{\Phi}}_{B0}$$ ) and ideality factor $$\left(n\right)$$ have been obtained. The barrier height increased (0.53 to 0.80 eV) while the ideality factor decreased (4.63 to 2.79) with increasing temperature from 220 to 340 K, indicating an improvement in the junction characteristics at high temperatures. Due to the inhomogeneity in barrier height, the conduction mechanism was investigated by Gaussian distribution analysis. Hence, the mean zero-bias barrier height ( $${\overline{\Phi}}_{B0}$$ ) and zero-bias standard deviation ( $${\sigma }_{0}$$ ) were calculated as 1.31 eV and 0.18, respectively. Moreover, for holes in p-type Si, Richardson constant was found to be 32.09 A cm−2 K−2 via modified Richardson plot. Using the capacitance-voltage $$\left( {C - V} \right) $$ and conductance-voltage $$\left( {G - V} \right) $$ characteristics, series resistance $$({R}_{s})$$ and density of interfacial traps $$({D}_{it})$$ have been also investigated in detail. A decreasing trend for $${R}_{s}$$ and Dit profiles with increasing frequency was observed due to the impurities at the CdZnTe/Si interface and interfacial layer between the front metal contact and CdZnTe film.