Electrical characterization and modeling of MOS structures with an ultra-thin oxide

Abstract

Ultra-thin oxides (1–3 nm) are foreseen to be used as gate dielectric in CMOS technology during the next 10 years. Nevertheless, they require new approaches in modeling and characterization due to the onset of quantum effects (confinement and direct tunneling). In this paper, the modeling of quantum effects is briefly reviewed, underlining recent results. An original method to extract the oxide thickness from C– V measurement without using time-consuming simulation is proposed. Moreover an analytical model for the gate current in the inversion regime is developed based on the concept of impact frequency and within the variational approach for quantum confinement. Finally, a new experimental procedure for effective mass and barrier height extraction in thin oxides is presented.