Electrical and Thermal Simulation of SWIFT (TM) High-Density Fan-Out PoP Technology

Abstract

The tremendous growth in smartphones and tablets has been fueled by consumer demand for increased mobility, functionality, and ease of use. This, in turn, has been driving an increase in functional convergence and 3D integration of integrated circuit (IC) devices, resulting in the need for more advanced and sophisticated packaging techniques. In particular, the integration of the application processor (AP) and dedicated memory has become increasingly complex. Smartphones and tablets have become virtual streaming devices requiring low power, high bandwidth memory (HBM). For quality, high-speed video and multi-tasking applications, the memory interface to the AP must have superior signal integrity to minimize crosstalk and insertion/return losses. In addition, the thermal management of the processor must allow the maximum clock speed and duty cycle for high-performance applications. Finally, to conserve battery life for the mobility device, the power distribution to the processor must be as efficient as possible. This creates a significant challenge for the semiconductor packaging industry to meet these demanding requirements for smartphone and tablet products. This paper introduces a leading-edge high-density fan-out (HD-FO) semiconductor packaging technology that addresses the need for higher levels of integration and improved electrical and thermal performance for mobile applications. This new innovative technique, called Silicon Wafer Integrated Fan-out Technology (SWIFT™) packaging, leverages the fine feature size and thin-film circuit patterning capabilities of wafer-level packaging. In addition, thin-film dielectric photolithography and pattern plating provides a significant reduction in package z-height, which is critical for advanced mobile devices. By incorporating a redistribution layer (RDL)-first/chip-last process flow, there is also an opportunity for yield optimization and cycle-time reduction. This work compares the electrical and thermal modeling results between a conventional Package-on-Package (PoP) and HD-FO SWIFT devices. The results reveal a highly integrated PoP structure with exceptional electrical, mechanical, and thermal performance benefits – compared to conventional organic laminate-based technologies – to meet the growing need for high-performance mobile applications.