Efficient State Identification for Finite State Machine-Based Testing

Finite state automata are widely used in specification-based testing. However, the existing specification- based testing techniques do not fully automate the generation of an FSM from a formal specification. Major challenges in automatic generation of FSM are the identification of disjoint states and transitions from the implicit pre- and postconditions of operations specified in a formal language like Z or Object-Z. It is important to extract pre- and postconditions from the specification because they form the basis for identification of pre- and post-states of the transitions of an FSM. In this paper, we present an automated approach to construction of an FSM from Object-Z formal specification. The proposed approach is supported by a tool and is also demonstrated on an example.

Extended state identification and verification using a model checker

State identification is a long standing problem in the area of Finite State Machine (FSM) based modeling and testing of discrete event systems. For the identification of the current state of the system, so-called homing and synchronizing experiments with FSMs are used whereas for the initial state identification one can perform a distinguishing experiment. The homing, synchronizing, and distinguishing experiments are known as “gedanken” experiments, and the sequences for these experiments can be derived for deterministic and nondeterministic, partial and complete specification FSMs that are used to formally represent the required behavior of systems under investigation. The problems of checking the existence and derivation of homing, synchronizing, and distinguishing sequences are known to become harder as a specification FSM turns to be nondeterministic and partial. It is also known that in some cases the complexity can be reduced through a ‘switch’ from preset to adaptive experiment derivation. In this paper, we study how the partiality and adaptivity affect the complexity of checking the existence of homing/synchronizing/distinguishing sequences for deterministic and nondeterministic FSMs and visualize the complexity issues via appropriate figures. We also mention that the existing solutions to state identification problems are widely used for verification and testing of finite state transition systems.

A well-established theory exists for testing finite state machines. One fundamental class of problems handled by this theory is state identification: we are given a machine with known state space and transition relation, but unknown initial state, and we are asked to find tests which identify the initial or final state of the machine. In this paper, we study state identification in the context of timed automata which contrary to, say, Mealy or Moore machines, is a suitable model for real-time systems. We are interested in digital-clock tests which have a finite clock precision and are thus implementable. We develop a general technique, based on time-abstracting bisimulation, which reduces the problem to the case of non-deterministic finite-state Mealy machines. We illustrate our technique on a toy example.

A well-established theory exists for testing finite-state machines, in particular Moore and Mealy machines. A fundamental class of problems handled by this theory is state identification: we are given a machine with known state space and transition relation but unknown initial state, and we are asked to find experiments which permit to identify the initial or final state of the machine, called distinguishing and homing experiments, respectively. In this paper, we study state identification for input/output transition systems. An input/output transition system is a finite state machine each edge of which is labelled with either an input or an output action. We propose a method to transform such a system into a Mealy machine. By existing methods, we build an input/output experiment which is a solution for the identification problems for the obtained Mealy machine. A solution for the identification problems for the original system is then extracted.

The existence of predicate and conditional statements of the protocol transition specified in EFSM model results in the generation of infeasible State Identification Sequence using traditional methods. Thus, how to automatically generate executable State Identification Sequences, in an efficient and effective way, becomes the critical issue for protocol conformance testing. In this paper, we present a novel method of executable state identification sequence generation used to preferably solve the executability problem of state identification sequences. Specifically, in terms of an executable analysis tree (EAT), the proposed method can ensure the executability of the generated state identification sequence. In a specific state identification scene, we can use a state projection subspace to simplify the state identification work. At last, an example was performed to show that the new method is how to work effectively.

Real robots with real sensors are not omniscient. When a robot's next course of action depends on information that is hidden from the sensors because of problems such as occlusion, restricted range, bounded field of view and limited attention, we say the robot suffers from the hidden state problem. State identification techniques use history information to uncover hidden state. Some previous approaches to encoding history include: finite state machines, recurrent neural networks and genetic programming with indexed memory. A chief disadvantage of all these techniques is their long training time. This paper presents instance-based state identification, a new approach to reinforcement learning with state identification that learns with much fewer training steps. Noting that learning with history and learning in continuous spaces both share the property that they begin without knowing the granularity of the state space, the approach applies instance-based (or "memory-based") learning to history sequences-instead of recording instances in a continuous geometrical space, we record instances in action-percept-reward sequence space. The first implementation of this approach, called Nearest Sequence Memory, learns with an order of magnitude fewer steps than several previous approaches.

Homing and synchronizing sequences are used for the current state identification in finite state machines (FSMs). Adaptive homing and synchronizing sequences for which the next input depends on the outputs to the previous ones, exist more often and usually are shorter than the preset. Thus, a lot of attention is paid to the existence check, derivation complexity and length of shortest adaptive state identification sequences. In this paper, we adapt the notions of adaptive homing and synchronizing sequences for FSMs with timeouts which are widely used for solving verification and testing problems of components of telecommunication systems. Based on the corresponding FSM abstraction, the procedures for deriving adaptive homing and synchronizing sequences are proposed for FSMs with timeouts when such sequences exist.KeywordsFinite state machinesTimeoutsHoming sequenceSynchronizing sequence

When testing from a deterministic Finite State Machine specification M of an implementation N, state identification plays an essential role. In the case that M does not have a single input sequence to identify its states, state identification has to be performed by using a set of input sequences, elements of which need to be applied at the same state of N. Locating sequences have been proposed in the literature in order to guarantee that N is brought back to the same state over and over, in order to apply these input sequences. Although the lengths of locating sequences are exponential in general, there are some methods proposed in the literature to reduce their length. In this paper, we present an improved method for reducing the length of locating sequences. We give a formal description of our method and explain how the existing methods relate to our method.

This paper is devoted to study the use of 'gedanken' experiments with Finite State Machines (FSMs) for protocol passive testing optimization. We discuss how the knowledge obtained from the state identification of an implementation under test (IUT) can be utilized for effective IUT monitoring. Differently from active testing techniques, such identification is performed by only observing the IUT behavior. If the state identification is possible (at least partially), then this fact allows to reduce the number of properties (test purposes) to be checked at certain execution point(s). Correspondingly, this allows to simplify and/or accelerate, i.e. improve the monitoring process by verifying the system behavior only at critical states against the appropriate set of properties associated with a given state. The paper discusses which 'gedanken' experiments can be considered for this purpose and how they can be derived for various specifications of communication protocols. The results presented in the paper are followed by an illustrative protocol example that demonstrates the efficiency of the proposed approach.

Ensuring the consistency of protocol implementation and protocol specification is the basic premise of wireless communication. With the application of wireless communication in more and more fields, the wireless communication environment becomes more and more complex, and the fault coverage of wireless protocol conformance testing is also facing more and more challenges. To solve this problem, this paper uses Finite State Machine (FSM) as a formal description tool for wireless protocols and presents a combining test method based on two test methods with complementary characteristics in the test technologies based on structural coverage and state identification. Then, the paper evaluates the effectiveness of the method based on 14 empirical cases. The experimental results show that the fault coverage of each empirical case can be effectively improved to 100% when the average test cost is only increased by 17.99%.

The Extended Finite State Machine (EFSM) is a commonly used model for specifying software systems. A test sequence for an EFSM is a sequence composed of values of input variables, which can make the EFSM "execute" along a complete path from entry to exit. Traditional test sequence generation methods for EFSM almost imitate those FSM-based approaches and focus on states identification. Most of them impose significant restrictions on the EFSM. This paper proposes a path-oriented approach to generating test cases for EFSM and presents a tool for test data generation. The experiments show that our tool can generate executable test sequences for EFSM models of software systems automatically in acceptable time.

This paper addresses the problem of test generation from partially specified deterministic finite state machines (FSMs) that may have indistinguishable states and, thus, are not necessarily reduced (minimized). The known methods for checking experiments that are based on state identification are not applicable to unreduced machines. We propose the so-called state-counting approach that is directly applicable to unreduced FSMs. The approach generalizes the idea of state identification in test generation methods for deterministic machines.

State identification is the well-known problem in the theory of Finite State Machines (FSM) where homing sequences (HS) are used for the identification of a current FSM state, and this fact is widely used in the area of software testing and verification. For various kinds of FSMs, there exist sufficient and necessary conditions for the existence of preset and adaptive HS and algorithms for their derivation. Nowadays timed aspects become very important for hardware and software systems. In this work, we address the problem of checking the existence and derivation of homing sequences for FSMs with timed guards. The investigation is based on the FSM abstraction of a Timed FSM.

We apply the state identification techniques for testing communication sys­tems which are modeled labeled by transition systems (LTSs). The confor­mance requirements of specifications are represented as the trace equivalence relation and derived tests have finite behavior and provide well-defined fault coverage. We redefine in the realm of LTSs the notions of state identification that were originally defined in the realm of input/output finite state machines (FSMs). Then we present the corresponding test generation methods and dis­cuss their fault coverage.