Abstract
We investigate the effects of guard-ring (GR) structures on the performance of silicon avalanche photodetectors (APDs) fabricated with the standard complementary metal-oxide-semiconductor (CMOS) technology. Four types of CMOS-compatible APDs (CMOS-APDs) based on the p <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> / n-well junction with different GR structures are fabricated, and their electric-field profiles are simulated and analyzed. Current characteristics, responsivity, avalanche gain, and photodetection bandwidth for CMOS-APDs are measured and compared. It is demonstrated that the GR realized with shallow trench isolation provides the best CMOS-APD performance.
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