Abstract
In this work, a modeling method is developed so that one can investigate the Electromagnetic Emission (EME) of different interconnection layouts in integrated circuit through simulation. We examine the near field EME from different interconnect layouts for input signal of various frequencies and amplitude of 1V, and we found that the layout indeed affects the EME performances of an integrated circuit. In some cases, it will not be able to pass the CISPR-25 standards for narrow and broad band requirements, but with a small change in the layout such as moving a ground trace from bottom to the top of an interconnect, it can then satisfy the CISPR-25 standards. The electric field distributions of interconnect structures are also presented and one is able to locate the maximum electric field and thus modification of the layout can be made possible.
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