Effect of the single grain boundary position on surrounding-gate polysilicon thin film transistors

Abstract

In this paper, single-grain-boundary (GB)-position-induced electrical characteristic variations in 300 nm surrounding-gate (i.e., gate-all-around (GAA)) polysilicon thin film transistors (TFTs) are numerically investigated. For a 2T1C active-matrix circuit, a three-dimensional device–circuit coupled mixed-mode simulation shows that the switching speed of GAA TFT can be improved by nine times, compared with the result of the circuit using single-gate (SG) polysilicon TFTs. The position of a single GB near the drain side has an bad effect on device performance, but the influence can be suppressed in the GAA polysilicon TFTs. We found that under the same threshold voltage, the variation of the threshold voltage can be reduced from 15% to 5%, with varying gate structures of the GAA polysilicon TFT.