Abstract
Low dielectric constant SiOC(–H) films were deposited on p-type Si(100) substrates by plasma-enhanced chemical vapor deposition (PECVD) using dimethyldimethoxysilane (DMDMOS, C 4H 12O 2Si) and oxygen gas as precursors. We studied the detailed electrical characterization of SiOC(–H)/ p-Si(100) interfaces using different experimental parameters for using the multilevel interconnections in ultra large-scale integrated circuits (ULSI). To improve the SiOC(–H)/ p-Si(100) interface, the wafer was cleaned using the RCA process and rinsed with deionized water. The deposited SiOC(–H) films were annealed at different temperatures ranging from 250 to 450 °C in a vacuum. The interface properties of the SiOC(–H)/ p-Si(100) with Cu/SiOC(–H)/ p-Si(100)/Al metal–insulator–semiconductor (MIS) structures were investigated by capacitance–voltage (C–V) measurement with a flat band shift by electric field stress. Trapped charge, fixed oxide charge, and the interface trap density of SiOC(–H) films were related to the dielectric breakdown and leakage current density at the SiOC(–H)/ p-Si(100) interface. From these analyses, detailed electrical properties defining the interface states of the MIS structures were reported.
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