Effect of biasing at elevated temperature on the electronic structure of Pt/HfO 2/Si stacks

Abstract

The spatial distribution of charges in a Pt/HfO 2/Si stack has been manipulated by applying a cyclic bias voltage ±2.5 V in combination with moderate ( T ∼ 630 K) heating. The modifications were monitored in situ by room temperature capacitance–voltage ( C–V) and current–voltage ( I–V) measurements and analyzed ex situ by hard X-ray photoelectron spectroscopy which additionally provides information on possible chemical changes at the interfaces. The experimental data on the charge/potential distributions resulting from the different steps of bias-temperature stress (BTS) are consistent with the model that additional oxygen vacancies, which are generated in HfO 2 and positively charged by charge transfer across the interface with a high work function metal (Pt), are driven across the HfO 2 layer. These vacancies ultimately control the observed growth/dissolution of SiO x at the bottom interface upon negative/positive BTS, respectively.