Effect of air spacer in underlap GAA nanowire: an analogue/RF perspective

Abstract

Here, a comprehensive study of the gate-all-around silicon nanowire field effect transistor (FET) (GAA-SNWTs) with source/drain underlap is performed to investigate the influence of air as spacer dielectric, on analogue/RF behaviour of the device. Parasitic capacitances in nanoscale devices contribute a dominating role in overall device capacitances. Introducing air as spacer dielectric () in source/drain underlap region, device parasitic capacitances deteriorates, which improves the overall capacitances. Thus, the analogue/RF figure-of-merit (FOM) of the device enhances, rendering the device suitable for low-power high-frequency operations. For targeting low power applications, FOMs are elicited at . It is perceived that intrinsic gain of the device is almost unaltered for distinct spacer dielectric ( and air). Frequencies like cut-off frequency () and maximum oscillation frequency () of air spacer dielectric-based underlap GAA-SNWTs are enhanced by 2.92 times and 3.11 times, respectively, when contrasted by the spacer-based GAA-SNWTs. This results in higher percentage improvement in RF-FOM in terms of transconductance frequency product (TFP), gain-frequency product (GFP), and gain transconductance frequency product (GTFP).