Edge Triggered Clock with Mtcmos Level Shifter Design for Soc Applications

Abstract

Level shifter is used to communicate between low core voltage to high input and output voltage. It is an interfacing component between two voltages. Level Shifter enters between different modules for voltage communication without using any additional pin. To minimize power consumption due to different supply voltages in the level shifter circuits, voltage shifting from low to above threshold. MTCMOS is used in this technique along with edge triggered flip flop. In this technique the predicted power consumption reached below 1.5mW from the conventional power consumption. Using Different power supply predicted power consumption is achieved in this Technique.