Double p-base structure for 1.2-kV SiC trench MOSFETs with the suppression of electric-field crowding at gate oxide

Abstract

We demonstrated 1.2-kV SiC trench metal–oxide semiconductor field-effect transistors with a double p-base structure via technology computer-aided design simulations (TCAD) and verified their breakdown characteristics by performing experiments. Two-different p-bases including a shallow junction and a deep junction were designed via Monte Carlo ion-implantation and two-dimensional device simulations with consideration of the punch-through behavior across the n-source/p-base/drift regions and the suppression of the electric-field crowding at the gate oxide near the bottom corner of the trench. Additionally, the trench depth and the distance between the edge of the deep p-base and the trench sidewall (DPG) were varied for a comparative analysis. When DPG was reduced, the breakdown voltage increased owing to the suppression of the electric field at the gate oxide, while the on-state drain current decreased owing to the increase in the JFET resistance.