Device Failure Analysis and Corrective Action Feedback to Process Control

Abstract

The failure mechanism defined as an oxide integrity defect in an integrated circuit is covered. A step-by-step analysis is discussed from pinholes in the oxide until the real failure mechanism is revealed. All interim process control changes which further delineated the real problem are discussed. These include double-masking, double KMER process, additional cleanliness requirements, etc. The final recognition of the oxide integrity defect failure mechanism is discussed in detail. The joint plans-of-action between Autonetics and the various suppliers are outlined. The test plans originated are discussed, and the results are indicated in general terms and the courses of action taken by the suppliers. Included are test techniques by the suppliers to further outline the corrective action regarding the fabrication process and, where possible, the actual final agreed-to position taken. Included are the courses taken by the supplier regarding measurement techniques to be implemented to prevent further processing of defective materials as well as ultimate delivery to Autonetics. A detailed analysis is made of the failure analysis technique used by Autonetics to uncover the actual oxide integrity defect. Discussion of the effects of electrical overstress to the device is described, and the feasibility of dielectric breakdown testing is outlined. A study is made of the correlation of the failure analysis done by the suppliers and by Autonetics. A study is also reported regarding circuit application and analysis results made by Autonetics to further define the actual failure mechanism.