Device Area Scale‐Up and Improvement of SWNT/Si Solar Cells Using Silver Nanowires

Abstract

DOI: 10.1002/aenm.201400186 Si solar cells. This difference becomes more problematic during the scale up to larger size cells, because the total resistive power loss per unit area ( P R ) scales with the cell area. [ 17 ] P R is given by / / R S max 2 s max 2 S max 2 P R I A R J A A R AJ ( ) = = = , where R s is the series resistance in the device, A is the device area, I max and J max are the cell current and current density in the maximum power output respectively. This equation illustrates that the P R is proportional to the product of the series resistance and the area ( R s A ), which directly scales with the cell area. As a result, all the CNT/Si and graphene/Si solar cells with high effi ciency (>10%) reported in the literature are limited with very small junction area (<15 mm 2 ), while the cells with large junction area (≈50 mm 2 ) suffers from very poor effi ciencies (≈1.3%) ( Table 1 ). Besides the effi ciency, a drastic degradation of other device parameters is also observed with a scale-up of the junction-area. For example, Shi et al. reported that the fi ll factor decreased from 72% to 50% when the junction area of graphene/Si solar cells increased from 4.7 mm 2 to 14.5 mm 2 . [ 10 ] A similar reduction of fi ll factor from 45% to 38% was also observed in the scale up of organic solar cells from 2.4 mm 2 to 1.13 cm 2 . [ 18 ]