Abstract

Core–shell Si/SiC nanostructures appear as promising building blocks for sensing applications, thanks to the high chemical stability of SiC coupled with the semiconducting properties of Si. In order to optimize the fabrication process of such structures, Si nanowires were coated with a thin SiC layer, and integrated as back-gated field-effet transistors. Two approaches for the fabrication of the SiC shell were then investigated. The first approach involves chemical vapor deposition of amorphous SiC on Si nanowires, without the need for masking; the second approach involves carbonization of Si surfaces to produce a thin crystalline SiC layer, but requires a larger thermal budget. The resulting structures were analyzed using high-resolution transmission electron microscopy (HR-TEM), and the devices were characterized electrically. Electrical characterization shows that the carbonization approach induces a dramatic decrease in drain-to-source current associated with gate leakage, whereas the electrical performances were preserved in the case of chemical deposition.

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