Abstract
A constant fraction discriminator was developed with a bipolar application-specific IC (ASIC) technology from NEC without a delay. It is called the differentiation constant fraction discriminator (DCFD). Prototype chips were examined for their integrity and performance. This technology has significant advantages over others currently in use for applications in high-density integration, and particularly for some large-scale experiments such as the B-factory and SSC. The performance of this differentiated constant fraction integrated circuit was tested by a trapezoidal input signal. The function of the DCFD IC was exactly as expected, and the full width of the time walk was 1 ns or less.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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