Detection of vowel-like speech: an efficient hardware architecture and it's FPGA prototype

Abstract

In this paper, a robust vowel-like speech (VLS) detection method using modified non-local means normalization factor (MNLM-NF) and it’s FPGA prototype is proposed. In the original NLM algorithm, at each instant of time, the NLM-NF is estimated by accumulating the weight values (WVs) computed over the search neighborhood. During the computation of WVs, one frame is kept as fixed while the other frame is slided over the search neighborhood. In this approach, each WV is computed by first accumulating the square of the difference between the signal amplitudes belonging to two different analysis frames and non-linearly mapping by using negative exponential function. The exponential operation for finding WVs requires significantly more hardware and delay the overall process. To address this issue, in this paper, first the WVs are computed without negative exponential operation. The MNLM-NF is then computed by mapping the accumulated WVs one time using negative exponential function. The MNLM-NF have same nature as the original NLM-NF. The MNLM-NF used as frond-feature for detecting VLS. The experimental results presented on the TIMIT database show that the proposed approach provides significantly improved performance in terms of identification rate and spurious rate when compared to the state-of-the art VLS detection methods. The hardware architecture of the proposed method is designed and verified by implementing it on Virtex-7( $$xc7vx690tffg1761-2$$ ) FPGA using Xilinx system generator.