Abstract
This paper describes a design technique for low voltage RF power amplifiers aimed at wireless communications. A power amplifier prototype was designed using this technique for a standard 0.8 /spl mu/m BiCMOS process. The circuit presents a small signal gain of 24.3 dB. Its output power is 27 dBm with a gain of 20.3 dB when biased with 3 V power supply at 1.9 GHz.
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