Abstract
Electronics engineers are currently faced with the task of designing linear and broad scale voltage regulated oscillator for analogue and a varied signal applications for a shorter design period of time. The Band gap reference source is used here to compensate the noise which affects the Phase lock loop operation from power supplied noise. A cascode current mirror based band gap reference current starved voltage controlled Oscillator (BG-CSVCO) is discussed in detailed as a new design strategy for reducing power supplied noise in Phase lock loop (PLL) applications. A cascode current mirror based band gap reference CS-VCO design is simulated and direct employing in 180nm Cadence CMOS technology. A frequency range of band gap reference CS-VCO is 0.009 GHz up to the 2.07 GHz for adjusting range of 0.5V to 1.8V with the power dissipation is 0.564mW. The VDD as supplied voltage was 1.8volt.
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