Design of Gate Diffusion Input based Wallace Tree Multiplier using Parallel Prefix Adders

Abstract

Wallace tree multiplier has partial product generation, partial product accumulation, and final addition stages. Usually, the final addition stage of the Wallace tree multiplier is designed with carry bypass adder (CBA). In the proposed work, two GDI (Gate Diffusion Input)-based Wallace tree multipliers are implemented with Kogge-Stone adder (KSA) and Brent-Kung adder (BKA) in the final addition stage respectively. As there is a trade-off between power and area, the number of MOSFETs is increased in the designed GDI-based Wallace tree multipliers using proposed adders as compared to carry bypass adder. The area is represented in terms of the number of MOSFETs are occupied. The proposed implementation though increases the number of MOSFETs, the power dissipation and the delays are predominantly reduced. As a technical contribution, the above parameters are investigated using Tanner V15.23, are compared and tabulated.