Abstract

Spin orbit torque magnetic random access memory (SOT-MRAM) has attracted massive research interests due to its promising application potential in high-speed computing systems (e.g. upper level caches). Here we propose an erasable spintronics memory based on a novel field-free SOT switching mechanism. The data writing is achieved through erase and subsequent program operations, both of which are implemented with unidirectional currents. For improving the storage density, the erase operation is shared by multiple bit-cells, meanwhile some access transistors could be replaced with diodes thanks to the use of unidirectional currents. The simulation results demonstrate that the proposed erasable spintronics memory is featured by sub-nanosecond write speed, femto-joule write energy and higher storage density than the conventional SOT-MRAMs.

Highlights

  • The traditional memories such as static random access memory (SRAM) and dynamic random access memory (DRAM) are facing the bottleneck of the soaring static power consumption, due to the increasing leakage currents with the scaling of the CMOS transistors

  • The data writing is achieved through erase and subsequent program operations, both of which are implemented with unidirectional currents

  • The simulation results demonstrate that the proposed erasable spintronics memory is featured by sub-nanosecond write speed, femto-joule write energy and higher storage density than the conventional spin orbit torque (SOT)-MRAMs

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Summary

INTRODUCTION

The traditional memories such as static random access memory (SRAM) and dynamic random access memory (DRAM) are facing the bottleneck of the soaring static power consumption, due to the increasing leakage currents with the scaling of the CMOS transistors. Spin transfer torque magnetic RAM (STT-MRAM) is one of the most promising candidates for constructing the next-generation low-power and high-density non-volatile memory.. The write speed of the STT-MRAM is limited to tens of nanoseconds, which cannot meet the requirement of SRAM-based caches In this situation, spin orbit torque (SOT)-MRAM has recently attracted massive research interests since it could achieve sub-nanosecond switching and shows great application potential in the upper level caches.. We proposed a novel field-free SOT mechanism for the deterministic switching of the perpendicular-anisotropy MTJ.. The switching operation is only dependent on the current path, regardless of the current direction This feature makes it possible to design novel high-performance MRAM. The erase operation could be shared by multiple bit-cells, resulting in higher storage density Both erase and program currents are unidirectional, the source degradation effect of the access transistors could be avoided.. The density, power consumption and write speed, compared with the conventional SOT-MRAMs

Array structure
Read and write operations
Simulation results and discussions
CONCLUSION
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