Abstract
A hardware architecture for rapid three-dimensional reconstruction is considered for positron emission tomography (PET). For possibly improved PET performance, obliquely oriented lines of response (LORs) are to be collected and properly utilized by one of several experimental 3-D reconstruction algorithms. Image signal-to-noise may improve. Septa removal increases the signal by allowing extra LOR collection but also increases the noise due to reduced shielding against out-of-plane events. The primary utility for all LOR collection and 3-D reconstruction algorithms may lie with count starved applications. A VLSI-based architecture is described which will support forward- and back-projection for a 3-D image (128*128*32 voxels) and 4096 2-D views (each from 192*32 LOR) totaling over 25 million lines of response projected into 0.5 million voxels. Varying the number of processing engines allows the time for either forward- or back-projection to be under 60 s. The custom VLSI chip for 3-D projections should require 45000 transistors.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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