Abstract
The paper considers methods to improve integrated circuits’ tolerance based on the SOI CMOS technology to total dose radiation. The main effects that occur in SOI CMOS transistors as a result of radiation response with the VLSI are discussed. The final part of the work demonstrated the main methods that make it possible to increase the radiation hardness of ICs based on the SOI CMOS technology. The advantages and disadvantages of each technique will be discussed. The prospects for developing microelectronics products with increased tolerance to external influences will be analyzed under constant process node scaling.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: IOP Conference Series: Materials Science and Engineering
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
