Abstract
ADS-B message detection requires a simpler and less resource consuming algorithm when applied to satellites. In this paper, to address the defects of the traditional S-mode message detection algorithm that is verified repeatedly causing the real-time problem or uses too much FPGA resource to be detected more quickly, the paper focus on the ADS-B S-mode message preamble detection and data bit extraction algorithm design and implementation. The preamble detection algorithm based on preamble correlation and the data bit extraction algorithm is designed on the simulation platform established by MATLAB/Simulink, and the hardware implementation of FPGA is completed. The design of the equipment is optimized for the shortage of space equipment resources in the timing control, bit process and the CRC check. The results show that the algorithm not only can effectively detect the preamble of S-mode messages, but also performs accurate data bit extraction and completes the detection of ADS-B messages. It is also suitable for hardware implementation and requires less hardware resources. Results indicate that it is suitable for application in spaceborne ADS-B receiving system.
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