Design and Implementation of 3-bit Flash Analog to Digital Converter for Low Power and High Speed Applications with New Ex-OR Based ROM Encoder

Abstract

This paper presents design of 3-bit power-efficient Flash Analog to Digital Converter for high-speed applications with single inverter comparator and Ex-OR based ROM encoder circuits. The Single Inverter Comparator circuit compares applied input voltage with the reference voltage and results in ‘0′ or ‘1′ output depending upon their magnitudes. The designed single inverter comparator consumes just 2.94pW amount of power. Outputs of these comparators form thermometer code which has to be applied to an encoder to obtain the digital code. A high speed Ex-OR based ROM encoder is designed to convert comparator outputs to the corresponding digital equivalents. A 3-bit Flash ADC is designed and simulated using Cadence analog design tools with 180 nm process technological library. The simulated results of the design show an average power consumption of 8.157uW and delay of 2.832 ns at 10 MHz. The area occupied by the design is 205.536um2.