Abstract
Distributed on-chip voltage regulation offers an appealing solution to many power delivery challenges in modern chip designs. In-depth understanding of such power delivery networks (PDNs) that encompass large on-chip passive power grids and active on-chip and/or off-chip voltage regulators is hampered by high network complexity and the intricate interactions between a multitude of active regulators and the large passive network. In this paper, we discuss some of the key challenges and opportunities in designing power delivery networks with on-chip voltage regulation. We discuss important network simulation and design issues and present illustrative results to demonstrate the potential benefits resulted from holistic optimization of the power delivery network.
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