Abstract

A photon counting system using covered single-photon avalanche diode (SPAD) based on a standard integrated circuit (IC) process ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.18~\mu \text{m}$ </tex-math></inline-formula> ) is designed and analyzed in this work. The SPAD is formed using the medium voltage (MV) doping layers of the process. To reduce the dark count rate (DCR) in the SPAD, a shaded SPAD with the same structure is fabricated on the same chip which is covered by a metal layer and only providing DCR for the DCR correction. This DCR provided by the shaded SPAD can also be used for the real time on chip monitoring of some other parameters, such as temperature, breakdown voltage, and afterpulsing probability. Experimental results show that the SPAD developed is able to detect the visible light from 450 to 850 nm with a 35% peak photon detection probability (PDP) achieved at around 550 nm with a bias voltage of 16 V (excess voltage of 3 V). A timing jitter of 176 ps is measured with an excess voltage of 3 V. The DCR in the SPAD tested is about 1.38 cps/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}^{2}$ </tex-math></inline-formula> with an excess bias voltage of 1 V and 14.62 cps/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}^{2}$ </tex-math></inline-formula> with the excess bias voltage of 3 V without the DCR correction. Results also show that a reduction of more than 85% in the DCR (background noise) can be achieved when the DCR correction is applied resulting in a DCR of 1.68 cps/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}^{2}$ </tex-math></inline-formula> with an excess bias voltage of 3 V. By monitoring the DCR of the shaded SPAD, the breakdown voltage and temperature of other on chip SPAD can be measured. The potential usefulness of the afterpulsing probability monitoring using the shaded SPAD and the crosstalk probability (CTP) between SPADs on the chip are analyzed. In addition, the effects of process variations on the SPAD performance are investigated by testing ten chips with the same SPADs fabricated, and a potential method is proposed for alleviate the process variations in the SPAD arrays.

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