Abstract
We consider the implementation of 16-bit floating point instructions on a Pentium 4 and a PowerPC G5 for image and media processing. By measuring the execution time of bench-marks with these new simulated instructions, we show that significant speed-ups are obtained compared to 32-bit FP versions. For image processing, the speed-up both comes from doubling the number ofoperations per SIMD instruction and the better cache behavior with byte storage. For data stream processing with arrays of structures, the speed-up comes from the wider SIMD instructions.
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