Demonstration of Mode-Division-Multiplex-Transmission Using an Analog Front-End LSI

Novel microcontrollers for closed caption system applications are described. The microcontrollers provide TV systems with the closed caption function when used with a front-end LSI. The microcontrollers employ an 8-b CPU core and integrated the closed caption decoding function and all functions required for TV set control. A closed caption system that utilizes the microcontrollers and the front-end LSI can provide stable data reception and low-cost implementation. >

The front-end LSI having a capable of 2 x reading and writing of BD-R/RW/ROM is developed. Its readability is improved by adopting 5-tap adaptive partial response maximum likelihood (PRML) with the PR(a,b,c,d,e) type channel. Due to the proposed PRML, less than 2 x 10 -4 of the bit error rate (BER) is achieved with radial and tangential tilt margin of over ±0.6° on 25 GB disc. The method of an optimum power control (OPC) for stable writing of various BD-R/RW is proposed. The presented chip contains 14-million transistors in a 60 mm 2 dies, and is fabricated in 0.18 μm CMOS technology.

This paper presents an isolated analog front-end (I-AFE) LSI with built-in isolation function for V.90, 56 kbps modems. The LSI has 1.5 kVrms. AC isolation and analog front-end functions within a 5 mm/spl times/4.5 mm die with 0.4 /spl mu/m SOI CMOS process and a 50 pin TSOP package. The on-chip isolation approach eliminates external isolation devices such as transformers or photo-couplers. A 100 Mbps transmission rate is attained by the on-chip isolator.

This paper reports an advanced process to realize high-quality multiple global layers on high-accuracy chip-redistributed wafer for wafer-level system integration using pseudo-SOC. We have been developing pseudo-SOC (p-SOC) technology by which KGD chips are integrated to a chip-redistributed wafer using high-rigidity epoxy resin and global layers with interconnecting chips are formed on it. The basic process has been established for p-SOC, and integration of MEMS and LSI, or front-end RF LSI and passive components, has been demonstrated. However, the first stage of p-SOC technology was based on a single global layer consisting of an insulating layer and a conductive layer, which limited the range of application. It is desirable to realize high-quality multiple global layers on the high-accuracy chip-redistributed wafer in order to expand its application toward system-level integration. For this purpose, it is necessary to keep all processes at low temperature for the reduction of warpage in the resin-based chip-redistributed wafer during several resin curing processes, to readjust resin-based materials, and to obtain high accuracy of chip position in chip-redistributed wafer. We developed the advanced p-SOC process to resolve these technical issues by improving the hardening process of resin, employing low-temperature-curing polyimide and optimizing the stress analysis by FEM simulation. As a result, realization of a novel one-chip module for a versatile high-sensitivity amplifier is demonstrated.

Development of front-end electronics and TDC LSI for the ATLAS MDT

A 900 MHz CMOS handy phone LSI is described. Three special RF-CMOS circuit technologies, fully integrated 900 MHz VCO with spiral inductor and varicap diode, new IF local frequency circuit, and effective image rejection system, are introduced.

An analog front end LSI for 9600/4800-b/s modems has been developed. To reduce total error rate, group delay time equalizers (GDT-EQLs) for bandlimiting filters are integrated on the chip. Noise level is suppressed to -77 dBm without the GDT-EQL. Relative GDT characteristics of Tx and Rx filters are less than 80 mu s in the frequency range from 800 Hz to 3.0 kHz. >

A Frontend LSI for radiation detectors made of GEM (Gas Electron Multiplier) foils is being developed. The LSI covers both applications for X-ray imaging and neutron imaging. The chip contains 64 channel frontend amplifiers followed by an output multiplexer. The Prototype LSI chip was designed for the 0.25μm CMOS process, submitted for fabrication and has been delivered just after the conference.

This work presents a front-end LSI using 0.13 /spl mu/m-process developed for HD DVD disc drives. HD DVD is a recently proposed format for optical discs, in which a blue laser is adopted and high-density recording of over 15 GB per side is achieved. The LSI chip consists of 3 subsystems: partial response maximum likelihood (PRML) read channel subsystem, servo control subsystem and memory control subsystem. Using this LSI, we have also developed a HD DVD player and verified the performance to be sufficient for high-definition movies or other content. The ability to play back high-definition quality movies proves the basic potential of this LSI.

The Semiconductor Multiple-Compton Telescope (SMCT) is being developed to explore the gamma-ray universe in an energy band 0.1--20 MeV, which is not well covered by the present or near-future gamma-ray telescopes. The key feature of the SMCT is the high energy resolution that is crucial for high angular resolution and high background rejection capability. We have developed prototype modules for low noise Double-sided Silicon Strip Detector (DSSD) system to realize the SMCT. The geometry of the DSSD is optimized to achieve the lowest noise possible. New frontend LSI optimized for low noise operation is developed. We report on the design and test results of the prototype system. We have achieved an energy resolution of 1.3 keV (FWHM) for 60 keV and 122 keV at 0 degree C.

An analog front-end LSI for 1200/2400 full-duplex modems which conform to CCITT V.22. and Bell 212A is described. The chip includes A/D and D/A converters, bandlimiting filters, delay equalizers, AGC circuit, tone generator, multipurpose low-pass filter, and voltage reference generator. The chip is fabricated by a 5-/spl mu/m CMOS process, and chip size is 6.50 mm/spl times/6.37 mm. The circuit operates from +5.0-V and -5.0-V power supplies. Typical power consumption is 100 mW.

A Semiconductor Multiple-Compton Telescope (SMCT) is expected to proceed a high-sensitivity soft gamma-ray observation in the energy range of 0.1-20 MeV. Double-sided silicon strip detector (DSSD) is one of key technologies for constructing SMCT, as well as the high-stopping semiconductor CdTe, because of its high energy resolution and high scattering efficiency. We have developed a low-noise system of DSSD and frontend LSI for SMCT, by optimizing geometrical structures of DSSD. We have thus obtained an energy resolution of 1.3 keV (FWHM) for 60 keV and 122 keV at -10°C in the multi-channel reading. Gamma-ray responses such as image flatness and charge splittings were found to be not problematic. We also demonstrated that our system achieved the good angular resolution close to the Doppler-broadening limit in the Compton imaging by two DSSDs.

A prototype frontend LSI for gamma-ray detectors with GEM (Gas Electron Multiplier) foils has been designed and fabricated. For reduction of number of channels and fast readout, we adopted X- and Y-strip readout method. Obtained charges are converted to digital by 10-bit 10Msps pipelined ADCs on the chip. In order that the ghost images are reduced, which are the drawback of the X- and Y-strip method, simple time-to-digital converters are designed on the same chip. The chip with 9 channels has been designed and fabricated with the TSMC 0.25¿m process. With the obtained ASIC chips, quick tests have been performed.

Presents a fully integrated analog front-end LSI chip which is an interface system between digital signal processors and existing analog telecommunication networks. The developed analog LSI chip includes many high level function blocks such as A/D and D/A converters with 11 bit resolution, various kinds of SCFs, an AGC circuit, an external control level adjuster, a carrier detector, and a zero crossing detector. Design techniques employed are mainly directed toward circuit size reductions. The LSI chip is fabricated in a 5 /spl mu/m line double polysilicon gate NMOS process. Chip size is 7.14/spl times/6.51 mm. The circuit operates on /spl plusmn/5 V power supplies. Typical power consumption is 270 mW. By using this analog front-end LSI chip and a digital signal processor, modern systems can be successfully constructed in a compact size.

This paper presents a digital front-end LSI using 0.13 mum CMOS for HD DVD/DVD/CD compatible drives. To insure sufficient readout performance in dual layer HD DVD-R/RW disks, the LSI is equipped with a dual-adaptive PRML feature. The experimental result shows that sufficient performance improvement has been achieved with this LSI.