Abstract
We present a review of reliability issues in AlGaN/GaN and AlGaAs/GaAs high electron mobility transistors (HEMTs) as well as Heterojunction Bipolar Transistors (HBTs) in the AlGaAs/GaAs materials systems. Because of the complex nature and multi-faceted operation modes of these devices, reliability studies must go beyond the typical Arrhenius accelerated life tests. We review the electric field driven degradation in devices with different gate metallization, device dimensions, electric field mitigation techniques (such as source field plate), and the effect of device fabrication processes for both DC and RF stress conditions. We summarize the degradation mechanisms that limit the lifetime of these devices. A variety of contact and surface degradation mechanisms have been reported, but differ in the two device technologies: For HEMTs, the layers are thin and relatively lightly doped compared to HBT structures and there is a metal Schottky gate that is directly on the semiconductor. By contrast, the HBT relies on pn junctions for current modulation and has only Ohmic contacts. This leads to different degradation mechanisms for the two types of devices.
Highlights
The basic unit of failure in Si device technology is the FIT (Failure unit), defined as 1 failure/109 device hours
With the bulk of reliability predictions focusing on Arrhenius extrapolations of device lifetime, they do not capture failure mechanisms that govern degradation under DC or RF operation that cannot be accelerated by elevated temperatures [1]
The most commonly reported degradation mechanisms for both GaAs and InP-based high electron mobility transistors (HEMTs) include contact problems, creation of surface states, hot carrier-induced, mechanical stress [3], or avalanche breakdown in the semiconductor, fluorine contamination, and corrosion [3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30]
Summary
The basic unit of failure in Si device technology is the FIT (Failure unit), defined as 1 failure/109 device hours. The continual introduction of new materials in compound semiconductor technologies was a drawback compared to Si, where problems such as mobile ion migration, electromigration, hot carrier effects, time dependent dielectric breakdown, corrosion, electrostatic discharge and soft errors could be systematically solved and protocols and models developed for their understanding and mitigation. This allowed the Si industry to focus on designing and building-in reliability at the wafer level and to introduce defect reduction efforts and strict process. With the bulk of reliability predictions focusing on Arrhenius extrapolations of device lifetime, they do not capture failure mechanisms that govern degradation under DC or RF operation that cannot be accelerated by elevated temperatures [1]
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