Defects induced by gamma-ray irradiation and post-irradiation annealing and its influence on the threshold voltage of p-channel power VDMOS transistors

Abstract

ABSTRACTThe investigations presented here study the creation as well as passivation/neutralization of positive trapped charge in the oxide (fixed traps) and traps near and at the Si–SiO2 interface (switching traps) exposed to gamma-ray irradiation and subsequent annealing (at room temperature and late at 150°C) in commercial p-channel power Vertical Double Diffused Metal-Oxide-Semiconductor transistors. The separation of fixed and switching traps that contributes to the threshold voltage shift was carried out using the midgap-subthreshold method. It was shown that fixed traps creation is a dominant process during irradiation. Subsequent postirradiation annealing at room temperature, without gate bias, was performed for , i.e. 19.4 days and it further lead to a relatively small change in , induced by a decrease in fixed traps density and an increase in switching traps density. The experimental results have revealed the existence of latent switching traps build-up during continued annealing at 150°C with +10 V gate bias. At latter annealing times, the switching traps passivation becomes the dominant process. In order to explain these experimental results, we have used models that include processes of creation and passivation of fixed and switching traps during irradiation and annealing. The possible application of these components in gamma-ray dosimetry was also analysed.