Abstract
A C-shaped pocket tunnel field effect transistor (CSP-TFET) has been designed and optimized based on the traditional double-gate TFETs by introducing a C-shaped pocket region between the source and channel to improve the device performance. A gate-to-pocket overlapping structure is also examined in the proposed CSP-TFET to enhance the gate controllability. The effects of the pocket length, pocket doping concentration and gate-to-pocket overlapping structure on the DC and analog/RF characteristics of the CSP-TFET are estimated after calibrating the tunneling model in double-gate TFETs. The DC and analog/RF performance such as on-state current (I on), on/off current ratio (I on/I off), subthreshold swing (SS) transconductance (g m), cut-off frequency (f T) and gain–bandwidth product (GBP) are investigated. The optimized CSPTFET device exhibits excellent performance with high I on (9.98 × 10−4 A/μm), high I on/I off (∼ 1011), as well as low SS (∼ 12 mV/dec). The results reveal that the CSP-TFET device could be a potential alternative for the next generation of semiconductor devices.
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