Current testing: Dead or alive?

Abstract

Summary form only given. Current, voltage and time (frequency) are the base parameters describing an electronic system. In the 1700's, Benjamin Franklin was one of the first experimenting with current tests, followed by many others shaping the current domain. In 1963 Frank Wanlass (Fairchild Semiconductor) planted the first seeds of using current testing as part of a structural approach to validate integrated circuits when publishing the concept of complementary-MOS (CMOS) logic circuitry. It occurred to him that a CMOS circuit would use very little power and that in standby; it would draw practically nothing - just the leakage current. It was therefore a fact that CMOS circuits with increased standby power consumption were defective. In 1981 Mark W. Levi demonstrated the concept of IDDQ testing (validating circuits by measuring and observing their quiescent supply current) in his ITC'1981 paper “CMOS is most Testable”. This paper kicked off a lot of research on IDDQ fault modeling, IDDQ defect detection capabilities, IDDQ and reliability, IDDQ efficiency. Much of that research happened in the late eighties - early nineties by “Chuck and Jerry”, exploring the benefits, followed by studies done by HP, IBM, TI, Philips, Alcatel, Ford Micro, ... Since then IDDQ testing became synonym to current testing. Extensive research revealed the IDDQ capabilities. Despite its demonstrated defect detection capabilities and screening efficiency, it was not an easy way for IDDQ to make it to the production test floor. The initial lack of commercial available ATPG tools and suitable measurement solutions were the hurdles to take. Then in 1996 a paper on IDDQ test: sensitivity analysis of scaling was published at ITC by Tom Williams at al. The purpose of this paper was to issue a warning that more complex IDDQ test schemes might be needed in future to deal with increased device complexity and increased background leakage, however it was interpreted as predicting the end of current testing (single threshold IDDQ more in particular) at least for high performance ICs. Next to current testing being a synonym for IDDQ testing, there is a wide variety of test processes out there where current measurements make up an important part of the test. The panel will revisit the ITC'96 prediction, make up a status and address questions such as: Is IDDQ testing (and its derivative such as delta IDDQ, current ratios, etc.) still applied these days and if so for which types of ICs and for what purposes (only leakage current measurements, test and diagnosis of bridging defects, etc.)?. IDDQ testing (and its derivative) is the dominant form of current testing. What about the others?. Does the actual use of current testing require/motivate/justify research on that topic?. Are the obstacles which led to the removal of current testing from test suites really impossible to overcome? What are these obstacles? Have we tried everything?. What other forms of current testing/current measurements are being deployed in industry today, what are the trends?. If current testing is not dead (yet), how long will it live?.