Correlation power analysis of modes of encryption in AES and its countermeasures

Abstract

Secure implementation of cryptographic algorithms is an important area of research. Cryptographer prefers to secure algorithms against known attacks; however designer focuses on efficient implementation. It has been established in several researches that an attack on implementation of a cipher requires far less effort than exploiting mathematical weakness of the structure. Implementation vulnerabilities are utilized by side channel attacks (SCA). In practical environment a block cipher is implemented in one of the modes of encryption like ECB, CBC, CTR. Our research focuses on finding leakage points in different modes of encryption including GCM to build hypothetical power consumption model for correlation power analysis (CPA) attack. CPA is simulated on AES-128-ECB in PIC18F4520 which yields secret key extraction in 2346 traces. Algorithmic level countermeasures for Counter mode and GCM mode are also presented. Proposed Counter and GCM mode implementation in FPGA yields 0.179% and 6.66% area overhead respectively. Authentication structure of proposed GCM is tolerant against fault injection attacks and propagates error with high probability. Single bit modifies approximately 51% bits in subsequent multiplications and disturbing the Tag by 48%. This research also highlights future recommendations for designing new resilient modes of encryption against power analysis attacks.