Convolutional Neural Network for Semiconductor Wafer Defect Detection

Abstract

Semiconductor wafer defects are major problem which causes huge loss in the manufacturing industry. The Wafer Bin Maps (WBMs) gives pictorial representation of location of defective integrated circuits (ICs) on the wafer. In WBMs, the defective ICs forms specific patterns. Determining these specific patterns is important, because each defect pattern is related to different fabrication errors. If these patterns were to be identified correctly, then the root fabrication problem can be recognized and can fix it to avoid further loss. An efficient defect detection method can reduce wafer test time and improve yield. In this paper, we propose a deep learning(DL) based model using convolutional neural networks (CNNs) to identify wafer defect patterns. In CNNs, convolution and pooling layer does feature extraction and fully connected layer does classification. In our model, there are eight convolution layer and three fully connected layers. CNN is robust to random noise and performs effectively not only for single defect detection but also for multiple defect detection. Thus can classify diverse defect patterns and achieve a better overall performance.