Continuous time quadrature band-pass ΔΣ modulator with input mixers

Abstract

A continuous time quadrature band-pass ΔΣ modulator preceded by input mixers is presented. Complex band-pass ΔΣ modulators provide better performance than band-pass ΔΣ modulators in digitising complex signals due to more efficient noise shaping (Yantzi et al., 1997). Continuous time implementation of the second-order ΔΣ noise shaping loop filter is preferred to a switched capacitor structure (van der Zwan and Dijkmans, 1996). Through the integration of mixers in the AD converter, RF input signals in the range 0.3–1.6 GHz can be down-converted to a digital I and Q output stream at a clock rate of 128 MHz. It is designed as a front-end for a low power receiver with a 2 MHz IF bandwidth centred around 4 MHz and attains a signal-to-noise ratio higher than 60 dB. The ΔΣ ADC and mixer are integrated in a 0.25 μm CMOS technology and consume 14 mW from a 2 V supply