Abstract
In this brief, a comparison between five different DAC realizations is presented for an equivalent multi-MΩ range resistance in a digitizing current sensor, namely resistor, current source, pseudo-resistor, T-network resistor, and switched-capacitor-resistor (SCR). These DACs are needed to realize current input continuous-time sigma-delta modulator (C-CTΣΔM) readouts to sense currents in the pA range. All DAC realizations are discussed concerning disadvantages and advantages and are implemented, laid out, and simulated on transistor level in a 180nm CMOS technology. The comparison is carried out on the area consumption, required circuit overhead, noise performance, inherent anti-aliasing filter (AAF) quality, and two sources of non-idealities (clock jitter and ISI). It is shown that the SCR-DAC - due to its decaying waveform and its inverse proportionality of the equivalent resistance to its capacitor size - shows the best compromise over the other methods and achieves the best performance in the smallest area.
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