Compact Modeling of High-Power FETs

Abstract

Introduction In this chapter we set the stage for the detailed discussion of the model analysis, extraction and construction choices that are described in subsequent chapters. So far, we have presented a background outlining how field effect transistors (FETs) have been developed for and used in RF and microwave power amplifiers. This has covered a high level introduction to how the FET-based transistors are structured and fabricated, in both silicon LDMOS and III–V semiconductor technologies, and an outline of how these field-effect transistors operate electrically. With this background in place, we can now discuss in greater detail some of the modeling issues that need to be considered carefully in order to construct an accurate transistor model that can be used in the design of RF power amplifiers. Our aim is to build models for the transistors that can be used in circuit simulators for the design of power amplifiers and power amplifier integrated circuits. These models are known as compact models. To achieve this objective, the models must be able to reproduce with acceptable fidelity the measured electrical and thermal properties of the transistors, and to simulate them quickly, with robust convergence. Another common modeling objective is to be able to inform the physical device design: in other words indicate which of the material and structural properties of a given transistor affect its electrical performance. The accuracy with which any model can achieve this depends on the level of abstraction of the model in the first place.