CMOS device fabrication and the evolution of optical lithographic exposure tools

Abstract

Advances in the performance of integrated circuits have long been fuelled by continuing progress in microlithography. For at least thirty years, the minimum feature size of leading edge semiconductor devices have been reduced to 70% of the previous generation every 3 years. In recent years, this extraordinary shrink rate in feature size has accelerated, so that production of 250nm generation microprocessors and DRAMs started in 1997, a year before the 1994 National Technology Roadmap for Semiconductors forecast, and initial production of 180nm generation devices is now forecast for 1999, a full two years before the 1994 roadmap predicted. In this paper, aspects of optical lithography being developed to address the requirements of advanced CMOS device production will be outlined. The extraordinary synergy between the requirements of IC fabrication and the evolution of optical lithographic projection systems will be explored. The 180nm and 150nm device generations will use 248nm lithography on high NA, KrF excimer laser steppers and scanners and DUV chemically amplified resists. It is likely that the 130 and 100nm generations will be supported by 193nm lithography using ArF scanning tools and VDUV CA resists. A further extension of optical lithography, to 157nm, using the F2 excimer laser as a source, is possible to address production at 100 and 70nm. Beyond the 70nm generation node, conventional optical lithography will become difficult, if not impossible, to use to fabricate the most critical masking layers and other, post-optical, lithography technologies may start to find their niches in IC manufacturing.