Abstract
This paper reports on the first experimental characterizations and modeling process of a MASMOS® transistor with a classical model, largely used for the modeling of other transistors. From DC IV and S-parameters measurements a large signal model (LSM) has been carried out. The great interest of this model is to allow a simulation time reduced by a factor of 100 compared to foundry model, like BSIM3 model, in classical one-tone HB simulation and to perform multi-tones simulation which is not possible with the foundry model due to prohibitive simulation times. The LSM has been validated through extensive multi-tones and load pull measurements. A good agreement between LSM simulation results and measurements fully validates the proposed modeling methodology. This LSM will serve to design a power amplifier (PA) for LTE applications.
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